PIC16F77T-I/ML【PDF 67/104 页】IC MCU FLASH 8KX14 A/D 44QFN

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Sheet目录3882

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Micrel, Inc.

KSZ8851-16MLLJ

March 2010

M9999-030210-1.0

Receive Control Register 1 (0x74 – 0x75): RXCR1 (Continued)

Bit

Default Value

R/W

Description

0x0

RXBE Receive Broadcast Enable

When this bit is set, the RX module receives all the broadcast frames.

0x0

RXME Receive Multicast Enable

When this bit is set, the RX module receives all the multicast frames (including broadcast

frames).

0x0

RXUE Receive Unicast Enable

When this bit is set, the RX module receives unicast frames that match the 48-bit Station

MAC address of the module.

0x0

RXAE Receive All Enable

When this bit is set, the KSZ8851-16MLLJ receives all incoming frames, regardless of the

frame’s destination address (see Address Filtering Scheme in Table 3 for detail).

0x0

Reserved

0x0

Reserved

0x0

RXINVF Receive Inverse Filtering

When this bit is set, the KSZ8851-16MLLJ receives function with address check operation

in inverse filtering mode (see Address Filtering Scheme in Table 3 for detail).

0x0

RXE Receive Enable

When this bit is set, the RX block is enabled and placed in a running state.

When this bit is cleared, the receive process is placed in the stopped state upon

completing reception of the current frame.

Receive Control Register 2 (0x76 – 0x77): RXCR2

This register holds control information programmed by the CPU to control the receive function.

Bit

Default Value

R/W

Description

15-5

Reserved.

0x0

IUFFP IPV4/IPV6/UDP Fragment Frame Pass

When this bit is set, the KSZ8851-16MLLJ will pass the checksum check at receive side

for IPv4/IPv6 UDP frame with fragment extension header.

When this bit is cleared, the KSZ8851-16MLLJ will perform checksum operation based on

configuration and doesn’t care whether it’s a fragment frame or not.

0x0

RXIUFCEZ Receive IPV4/IPV6/UDP Frame Checksum Equal Zero

When this bit is set, the KSZ8851-16MLLJ will pass the filtering for IPv4/IPv6 UDP frame

with UDP checksum equal to zero.

When this bit is cleared, the KSZ8851-16MLLJ will drop IPv4/IPv6 UDP packet with UDP

checksum equal to zero.

0x1

UDPLFE UDP Lite Frame Enable

When this bit is set, the KSZ8851-16MLLJ will check the checksum at receive side and

generate the checksum at transmit side for UDP Lite frame.

When this bit is cleared, the KSZ8851-16MLLJ will pass the checksum check at receive

side and skip the checksum generation at transmit side for UDP Lite frame.

0x0

RXICMPFCC Receive ICMP Frame Checksum Check Enable

When this bit is set, the KSZ8851 will check for correct ICMP checksum for incoming

ICMP frames (only for non-fragment frame). Any received ICMP frames with incorrect

checksum will be discarded.

0x0

RXSAF Receive Source Address Filtering

When this bit is set, the KSZ8851-16MLLJ will drop the frame if the source address is

same as MAC address in MARL, MARM, MARH registers.

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